2026-d2-0900-keynote-2-networking-innovations-for-gigascale-ai-systems

Q: where CPU racks are deployed? Front-end or backend?

When we were first promoting SDN in ONF we predicted that networking would become an arm of computing. Gilad’s presentation shows that this has come to pass.

CPU Racks for what purpose? The ones working with the GPUs are integrated with the GPU on the same board.

What is the maximum distance supported by scale across solution? Has scale across solution been deployed in production? Is scale across solution based on back-to-sender notification?

How Enfabrica IP help Nvidia regarding KV cache or storage?

NVLink has now been expanded to two levels, allowing eight NVL72s to be connected within a single NVLink domain. But how are the individual NVL72s connected to one another? Is it correct to assume that half of the links from the NVSwitch are used to connect the switches to each other rather than to the GPUs?

What is Nvidia position about XPO ?

Does NVIDIA consider NIC disaggregation in its roadmap for NICs?

Does distance aware load balancing refer to choosing shortest path? Or it is something beyond this?

Does distance-aware load balancing spray packets across DCIs?

In yesterday's Meta keynote, it was highlighted that the "Scale-across" domain involves highly heterogeneous environments, particularly regarding distance (propagation delay) and bandwidth. Given this context, can Spectrum-XGS consistently guarantee optimal performance under such diverse conditions? I would love to hear your thoughts on the future challenges in this area!

Is DCI or context memory system also aware of type of network access, prefill vs decoding, normal KV $ vs MOE?

What is the relation between DOCA and DSX?

you talked about Oberon Rack, how about the Kyber Rack for 144 per Rack?

What are the primary challenges you faced with hot liquid cooling especially with the large copper backplane?

Why SSD is not located in GPU server?

What about the Out-of-Band Management network? What's next after 10G?

Will you deploy separate dedicated Vera racks for agentic services? If so, what is the bandwidth per GPU?

How will you approach scaling bandwidth with the Spectrum-X switch in future generations? WDM?

How do we access the DSX Air?

How does MRC (or UEC) factor into the Scale-Out or Scale-Across RDMA network design?

Hi, Shainer.
Thanks for the nice talk
I have a question about Nvidia Spectrum CPO: What are the energy efficiency and bandwidth density?

For a third-party XPU connecting through NVLink Fusion, what tends to be the hardest part to get right in hardware?

How might emerging new memory tiers, such as HBF, high bandwidth flash, impact CMX context storage architecture and its interconnect requirements?
(Fantastic talk reviewing your stunning chiplet-to-datacenters co-design, thank you.)

is Ravi sharing?

Thanks for letting us know

@Ravi Mahatme What is the bandwidth overhead to support cache coherency vs using just CXL.io, for shared memory?

@shainer Great keynote. Super insightful. Would you, or a colleague, be interested in a short chat about our "Adaptive Wireless Infrastructure for AI Data Centers"? It's a great next generation Out-of-Band Management network. 100G, Ethernet Compatible and no more wires. Truly out-of-band. Teradio is a spinout company from Northeastern Univ. (NU) and we've just raised $5M from the US NSF for advanced research on AI DCs wireless networking. Nvidia is a sponsor of the research, though we'd like to have a strategic discussion with you as well. Thank you, Greg Whelan, CEO Teradio, Inc. <mailto:gwhelan@teradop.co|gwhelan@terad>io.co