Thursday, August 13, 2026
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Ryan Scherbarth (nvidia) renamed the channel from "2026-d2-0800-open-interconnect-innovations-a-deep-dive-into-the-aulink" to "2026-d3-0800-tutorial-open-interconnect-innovations-a-deep-dive-into-the-ualink"
Ryan Scherbarth (nvidia) renamed the channel from "2026-d3-0800-tutorial-open-interconnect-innovations-a-deep-dive-into-the-ualink" to "2026-d3-0800-tutorial-track-2-open-interconnect-innovations-a-deep-dive-into"
Friday, August 21, 2026
C
Do we know if we will be able to get the slides from the tutorial?
S
We have requested slides from all the presenters and will make them available on the website on a rolling basis.
L
Thanks for presentation. Is there any vendor to use UALink completely without using Ethernet in layer 2?
3 replies
L
Thanks @Rob Pelt . Who will deploy it?
R
Sorry, I don't have knowledge of consortium members roadmaps.
H
How to support RAS in chiplets?
L
How UCIe 3.0 compares with Eliyan’s NuLink?
C
Curious about how the compliance program works. Do you have a reference package, or a reference package design requirement that you must design to. Who is developing the golden die and is it possible to get them? What functionality does the golden die support.
Q
Do chiplets have to talk to chiplets on the other end? I got this impression from your diagram, but I believe I am wrong.
C
Will UALink transaction layer be added to the UCIe spec, or left as a vendor defined with it details in the UALink spec
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B
Will it be possible to build tools to assisting programmers in getting good performance out of chiplets? For example to know how to optimize data transfers?
C
Thanks for the compliance answer. I think that covers most of it. Is it possible to get the golden die design and arch information? Would the vendor purchase them and insert them into a package?
🙌 1
C
Thanks for the great presentation!!!
B
Thanks for the nice presentation.
R
@channel We will be going on break until the next session starting at 11:30 PT in the following channel: #C0BQ9G9ULHJ
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L
One question, any idea on impact of CPU racks on data center traffic?