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Chip-let Interconnect Test and Repair

August 23 @ 12:30 pm - 3:00 pm UTC+0

Presenter Name: Sreejit Chakravarty

Abstract: The goal of this tutorial is to introduce the attendees to the chip-let interconnect test and repair problem. In part 1 of the proposed two-part tutorial, we delve into the fundamentals of chip-let interconnect test and repair. This will include topics listed under Topic number 1 in Section 2.5. Broadly speaking, attendees will understand the impact of various packaging technology on chip-let interconnect test and repair, the kind of failure mechanisms observed and expected, tests required to detect such failures, repair mechanism required to repair interconnects against such failure modes, etc.

Bio: Dr. Sreejit Chakravarty is an IEEE Lifetime Fellow, a highly recognized Researcher, Inventor, and a Distinguished Engineering Leader, with extensive industry and academic experience. He is currently a Distinguished Engineer at Ampere Computing, Santa Clara, CA, USA where he drives the strategic initiatives for product quality. Prior to this he had over 25 years of industry experience as a Principal Engineer with Intel Corporation and Distinguished Engineer at LSI and AVAGO. He started his career in academia as an Associate professor of Computer Science, at The State University of New York at Buffalo, where his work was funded by multiple National Science Foundation Grants. He has architected innovative solutions across the entire silicon life cycle spanning Silicon Quality and Reliability (RAS, Functional Safety and Silent Data Errors); and subsequently drove them from concept to product intercept. He has published 1 book, authored 145+ IEEE papers, has 23 issued US patents, graduated several doctoral students, served in various capacity at numerous IEEE conferences, and delivered multiple keynote addresses. The two most recent ones are: IEEE Asian Test Symposium, 2023; and International Symposium on Electronic Design Automation, 2024. He has mentored research at several universities like Princeton, USC, UIUC, etc. For his professional work he has been recognized as an IEEE Fellow and SUNY Distinguished Alumni.