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Next Generation Network Interfaces

August 18 @ 12:30 pm - 1:20 pm UTC-7

Invited Talks

12:30 – 13:00: The HPE Cassini NIC

Invited Speaker: Keith Underwood, HPE

13:00 – 13:20: GPU Scaling with Intel oneAPI Level Zero Peer-to-Peer Solution

Invited Speakers: Jaime Arteaga and Ravindra Babu Ganapathi – Intel

Having multiple GPUs in a system provides applications with the potential to scale their compute performance, by allowing them to distribute compute kernels and memory allocations amongst the available GPUs. For this paradigm model to work with the highest performance, it is essential that each GPU has direct access to the memory of its peers, to avoid the otherwise costly process of bouncing memory to the host and accessing it through PCIe. In this paper, we present Intel’s solution for peer-to-peer GPU access, known as Scale-Up, and its implementation using Intel oneAPI Level Zero GPU driver. Here, we describe the Scale-Up support added in the GPU user-mode driver, leveraging dma-buf framework, a standard kernel interface to access peer GPU memory over interconnect, such as PCIe or Xe Link, as well as how applications can exploit Scale-up on systems with multiple Intel GPUs to achieve maximum performance. The solution described here can be extended to any accelerator and interconnect including support for interoperability of heterogenous accelerators.

Bios:
Jaime Arteaga is a Graphics Software Engineer at Intel Corp., working on the development of Intel(R) oneAPI drivers for Intel(R) GPUs. Previously, he worked in Intel (R) OmniPath on performance optimizations and development of runtime libraries libfabric enablement. He holds a PhD in Computer Engineering from University of Delaware, DE (USA) and a mastesr in Electronics Engineering from Universidad del Valle in Colombia. His research interests include software programming models, dataflow programming, and performance analysis of shared and distributed memory systems.

Ravindra Babu Ganapathi (Ravi) is the Technical Lead/Engineering Manager responsible for technical leadership, vision and execution of Intel (R) OneAPI Level Zero drivers for Intel(R) GPUs. In the past, Ravi lead development of Intel (R) OmniPath libraries including enabling libfabric, he was also the lead developer and architect for Intel Xeon Phi offload compiler runtime libraries (MYO, COI) and also made key contributions across Intel Xeon PHI software stack including first generation Linux driver development. Before Intel, Ravi was lead developer implementing high performance libraries for image and signal processing tuned for x86 architecture. Ravi received his MS in Computer Science from Columbia University, NY in 2010. His research interests spans across compilers, computer architecture and High Speed interconnects. He has published three research papers, holds patents related to Interconnect and shared memory programming.