Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems, clusters, data centers, and clouds. This yearly conference is attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field.

Themes include cross-cutting issues spanning computer systems, networking technologies, and communication protocols for high-performance interconnection networks. This conference is directed particularly at new and exciting technology and product innovations in these areas. Contributions should focus on real experimental systems, prototypes, or leading-edge products and their performance evaluation. In past year’s the best papers on interconnect micro-architecture have been invited to submit extended versions of their papers to special journal editions, we are pursuing this once again this year.

Building on last year’s successful technical program comprising keynotes, technical sessions, and panels on networking for data-centers and Edge computing, the 2020 edition of Hot Interconnects is generously hosted by QCT at their campus in San Jose, CA.

This year’s conference focuses on SmartNICs and their adoption and use in traditional and non-traditional applications, such as Cloud computing. We hope you can join us there.

We invite paper submissions across a wide range of topics and levels, ranging from fundamentals to the latest advances in hot topic areas.

Topics of Interest

(but not limited to these)

  • Novel and innovative interconnect architectures
  • Multi-core processor interconnects
  • System-on-Chip Interconnects
  • Advanced chip-to-chip communication technologies
  • Optical interconnects Protocol and interfaces for inter-processor communication
  • Survivability and fault-tolerance of inter-connects
  • High-speed packet processing engines and network processors
  • Systems software for communication
  • System and storage area network architectures and protocols
  • High-performance host-network interface architectures
  • High-bandwidth and low-latency I/O
  • Pb/s switching and routing technologies
  • Innovative architectures for supporting collective communication
  • Novel communication architectures to support cloud & grid computing
  • Centralized and distributed cloud interconnects
  • Requirements driving high-performance interconnects
  • Traffic characterization for HPC systems and commercial data centers
  • Software-defined networking and software overlay networks
  • Software for network bring-up, configuration and performance management
  • (OpenFlow, OpenSM)
  • Data Center Networking


Event Date
Paper abstract deadline May 15th, 2020
Submission deadline May 22th, 2020
Notification of acceptance June 19th, 2020
Symposium August 19-20, 2020
Tutorials August 21, 2020


This year we invite papers to be submitted either as regular, long papers (6-8 pages) or as hot topic papers (3-4 pages). Hot topic papers could be positional papers, industry papers, or papers describing hot-off-the-press breaking research results, and will judged accordingly and independently from the regular long papers.

  • Papers need sufficient technical detail to judge quality and suitability for presentation
  • Submissions should include title, author, abstract, and paper in double-column, IEEE format
  • Long paper limit: 8 pages, single-spaced, 2 columns
  • Hot topic paper limit: 4 pages, single-spaced, 2 columns
  • Papers should be submitted electronically through EasyChair Submit Paper
  • Accepted papers (both long and hot topic papers) will be published in proceedings by the IEEE Computer Society